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LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
T
HE
WITH
5-BIT DAC
I
NFINITE
P
OWER
OF
I
N N O VAT I O N
P
RODUCTION
D
ATA
S
HEET
DESCRIPTION
The LX1664/64A and LX1665/65A are monolithic switching regulator controller IC's designed to provide a low cost, high performance adjustable power supply for advanced microprocessors and other applications requiring a very fast transient response and a high degree of accuracy. Short-circuit Current Limiting without Expensive Current Sense Resistors. Current-sensing mechanism can use PCB trace resistance or the parasitic resistance of the main inductor. The LX1664A and LX1665A have reduced current sense comparator threshold for optimum performance using a sense resistor. For applications requiring a high degree of accuracy, a conventional sense resistor can be used to sense current. Programmable Synchronous Rectifier Driver for CPU Core. The main output is adjustable from 1.3V to 3.5V using a 5-bit code. The IC can read a VID signal set by a DIP switch on the motherboard, or hardwired into the processor's package (as in the case of Pentium(R) Pro and Pentium II processors). The 5-bit code adjusts the output voltage between 1.30 and 2.05V in 50mV increments and between 2.0 and 3.5V in 100mV increments, conforming to the Intel Corporation specification. The device can drive dual MOSFET's resulting in typical efficiencies of 85 - 90% even with loads in excess of 10 amperes. For cost sensitive applications, the bottom MOSFET can be replaced with a Schottky diode (non-synchronous operation). Linear Regulator Driver. The LX1664/ 65 family of devices have a secondary regulator output. This can drive a MOSFET or bipolar transistor as a pass element to construct a low-cost adjustable linear regulator suitable for powering a 1.5V GTL+ bus or 2.5V clock supply. (continued next page)
K E Y F E AT U R E S
I 5-bit Programmable Output For CPU Core Supply I Adjustable Linear Regulator Driver Output I No Sense Resistor Required For ShortCircuit Current Limiting I Designed To Drive Either Synchronous Or Non-Synchronous Output Stages I Soft-Start Capability I Modulated, Constant Off-Time Architecture For Fast Transient Response And Simple System Design I Available Over-Voltage Protection (OVP) Crowbar Driver And Power Good Flag (LX1665 only)
A P P L I C AT I O N S
I Socket 7 (Pentium Class) Microprocessor Supplies (including Intel Pentium Processor, AMD-K6TM And Cyrix(R) 6x86TM, Gx86TM and M2TM Processors) I Pentium II and Deschutes Processor & L2Cache Supplies I Voltage Regulator Modules
IMPORTANT: For the most current data, consult LinFinity's web site: http://www.linfinity.com.
PRODUCT HIGHLIGHT
LX1665
IN A
P E N T I U M I I S I N G L E -C H I P P O W E R S U P P L Y S O L U T I O N
F1 20A L2 1H Q1
12V C3 0.1F
1 2 3
5V 6.3V 1500F x3 C2 L1 2.5H
U1 LX1665
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 LFB VC1 TDRV GND BDRV VCC CT OV LDRV PWRGD
18 17 16 15 14 13 12 11 10
C5 1F
IRL3102
R1 0.0025
Supply Voltage for CPU Core
VOUT
VID0 VID1 VID2 VID3 VID4
4 5 6 7 8 9
Q2
IRL3303
6.3V, 1500F x 3**
C1
C8 680pF
C9 330F Q4 IRLZ44 R5 R6
** Three capacitors for Pentium Four capacitors for Pentium II
Supply Voltage For I/O Chipset or GTL+ Bus
18-pin Wide-Body SOIC
OV PWRGD
C7 330F
TA (C) 0 to 70
N
Plastic DIP 16-pin
LX1664CN LX1664ACN
N Plastic DIP 18-pin
LX1665CN LX1665ACN
D Plastic SOIC 16-pin
LX1664CD LX1664ACD
DW Plastic SOIC Wide 18-pin
LX1665CDW LX1665ACDW
Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (e.g. LX1664CDT)
Copyright (c) 1999 Rev. 1.2 11/99
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
Selection Guide
PA C K A G E O R D E R I N F O R M AT I O N
See next page for
1
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET PACKAGE PIN OUTS
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
D E S C R I P T I O N (con't.)
Smallest Package Size. The LX1664 is available in a narrow body 16-pin surface mount IC package for space sensitive applications. The LX1665 provides the additional functions of Over Voltage Protection (OVP) and Power Good (PWRGD) output drives for applications requiring output voltage monitoring and protection functions. Ultra-Fast Transient Response reduces system cost. The modulated offtime architecture results in the fastest transient response for a given inductor, reducing output capacitor requirements, and reducing the total regulator system cost. Over-Voltage Protection and Power Good Flag. The OVP output in the LX1665 & LX1665A can be used to drive an SCR crowbar circuit to protect the load in the event of a short-circuit of the main MOSFET. The LX1665 & LX1665A also have a logiclevel Power Good Flag to signal when the output voltage is out of specified limits.
VC1 TDRV GND BDRV VCC CT LDRV LFB
N PACKAGE -- 16-Pin LX1664/1664A (Top View)
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 LFB
1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10
DEVICE SELECTION GUIDE DEVICE LX1664 LX1664A LX1665 LX1665A Packages 16-pin SOIC & DIP 18-pin SOIC & DIP OVP and Power Good No Yes Current-Sense Comp. Thresh. (mV) 100 60 100 60 Optimal Load Pentium-class (<10A) Pentium II (> 10A) Pentium-class (<10A) Pentium II (> 10A)
VC1 TDRV GND BDRV VCC CT OV LDRV PWRGD
N PACKAGE -- 18-Pin LX1665/1665A (Top View)
A B S O L U T E M A X I M U M R AT I N G S (Note 1) Supply Voltage (VC1) .................................................................................................... 25V Supply Voltage (VCC) .................................................................................................... 15V Output Drive Peak Current Source (500ns) ............................................................... 1.5A Output Drive Peak Current Sink (500ns) ................................................................... 1.5A Input Voltage (SS, INV, VCC_CORE, CT, VID0-VID4) ........................................... -0.3V to 6V Operating Junction Temperature Plastic (N, D & DW Packages) ............................................................................. 150C Storage Temperature Range .................................................................... -65C to +150C Lead Temperature (Soldering, 10 Seconds) ............................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Pin numbers refer to DIL packages only.
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VC1 TDRV GND BDRV VCC CT LDRV LFB
D PACKAGE -- 16-Pin LX1664/1664A (Top View)
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 LFB
1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10
T H E R M A L D ATA
N (16-PIN DIP) PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA N (18-PIN DIP) PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA DW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 90C/W 120C/W 60C/W 65C/W
VC1 TDRV GND BDRV VCC CT OV LDRV PWRGD
DW PACKAGE -- 18-Pin LX1665/1665A (Top View)
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow
2
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, 10.8 < VCC < 13.2, 0C TA 70C. Test conditions: VCC = 12V, T = 25C. Use Application Circuit.)
Parameter Reference & DAC Section
Regulation Accuracy (See Table 1) Regulation Accuracy
Symbol
Test Conditions
LX1664/1665 (A) Min. Typ. Max.
-30 -1 2 1 40 210 2 1 0.42 100 0.8 41 200 27 100 60 200 70 70 11 10 0.06 0.8 0.8 9.9 10.1 0.31 5.5 0.15 30 1
Units
mV % s s ppm A V V V ns A mV ns A mV mV ns ns ns V V V V V V V mA V mA % % V % mA V % ppm % % mA
(See Table 1 - Next Page) (Less 40mV output adaptive positioning), VCC = 12V, ILOAD = 6A
1.8V VOUT 2.8V OT VCC_CORE = 1.3V, CT = 390pF VCC_CORE = 3.5V, CT = 390pF VCC_CORE = 1.3V to 3.5V VCC_CORE = 1.3V, VCT = 1.5V VCC_CORE = 1.3V VCC_CORE = 3.5V 10% Overdrive 1.3V < VSS = VINV < 3.5V
Timing Section
Off Time Initial Off Time Temp Stability Discharging Current Ramp Peak Ramp Peak-Valley Ramp Valley Delay to Output
IDIS VP VRPP
180 0.9 0.37
240 1.1 0.47
Error Comparator Section
Input Bias Current Input Offset Voltage EC Delay to Output IB VIO 36 10% Overdrive IB VCLP 1.3V < VINV = VCC_CORE < 3.5V Initial Accuracy Initial Accuracy 10% Overdrive VC1 = VCC = 12V, CL = 3000pF VC1 = VCC = 12V, CL = 3000pF VCC = VCC = 12V, ISOURCE = 20mA VCC = VCC = 12V, ISINK = 200mA VCC = VCC = 12V, ISOURCE = 20mA VCC = VCC = 12V, ISINK = 200mA VCC = VC = 0, IPULL UP = 2mA 2 46
Current Sense Section
Input Bias Current (VCC_CORE Pin) Pulse By Pulse CL LX1664/1665 LX1664A/1665A CS Delay to Output 85 50 35 115 70
Output Drivers Section
Drive Rise Time Drive Fall Time Drive High Drive Low Output Pull Down TR TF VDH VDL VPD VST VHYST ISD VOL ICD
0.1 1.2 1.4 10.4
UVLO and S.S. Section
Start-Up Threshold Hysteresis SS Sink Current SS Sat Voltage
VC1 = 10.1V VC1 = 9V, ISD = 200A VCC = VC1 = 12V, Out Freq = 200kHz, CL = 0 (VCC_CORE / DACOUT) IPWRGD = 5mA (VCC_CORE / VDAC) VOV = 5V Set by external resistors IL = 0.5A using 0.5% resistors
2
0.6 27
Supply Current Section
Dynamic Operating Current Lower Threshold Hysteresis Power Good Voltage Low Over-Voltage Threshold OVP Sourcing Current
Power Good / Over-Voltage Protection Section (LX1665 Only)
88 90 1 0.5 117 45 92 0.7 125
110 30 1.5 -1.5
Linear Regulator Section
Output Voltage Setpoint Accuracy Output Temperature Drift Load Regulation Cummulative Accuracy Op-Amp Output Current 3.6 1.5 40 1.5 3 Open Loop 50 70
Copyright (c) 1999 Rev. 1.2 11/99
3
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
ELECTRICAL CHARACTERISTICS
Table 1 - Adaptive Transient Voltage Output Processor Pins
0 = Ground, 1 = Open (Floating)
(Output Voltage Setpoint Typical)
Output Voltage (VCC_CORE) VID0 0.0A
Nominal Output*
VID4
VID3
VID2
VID1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 * Nominal =
1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 DAC setpoint voltage
1 1 1.34V 1.30V 1 0 1.39V 1.35V 0 1 1.44V 1.40V 0 0 1.49V 1.45V 1 1 1.54V 1.50V 1 0 1.59V 1.55V 0 1 1.64V 1.60V 0 0 1.69V 1.65V 1 1 1.74V 1.70V 1 0 1.79V 1.75V 0 1 1.84V 1.80V 0 0 1.89V 1.85V 1 1 1.94V 1.90V 1 0 1.99V 1.95V 0 1 2.04V 2.00V 0 0 2.09V 2.05V 1 1 2.04V 2.00V 1 0 2.14V 2.10V 0 1 2.24V 2.20V 0 0 2.34V 2.30V 1 1 2.44V 2.40V 1 0 2.54V 2.50V 0 1 2.64V 2.60V 0 0 2.74V 2.70V 1 1 2.84V 2.80V 1 0 2.94V 2.90V 0 1 3.04V 3.00V 0 0 3.14V 3.10V 1 1 3.24V 3.20V 1 0 3.34V 3.30V 0 1 3.44V 3.40V 0 0 3.54V 3.50V with no adaptive output voltage positioning.
Note: Adaptive Transient Voltage Output In order to improve transient response a 40mV offset is built into the Current Sense comparator. At high currents, the peak output voltage will be lower than the nominal set point, as shown in Figure 1. The actual output voltage will be a function of the sense resistor, the output current and output ripple.
Output Load
0A 5A/Div. 0 to 14A
Time - 100s/Div.
FIGURE 1 -- Output Transient Response (using 5m sense resistor and 5H output inductor)
4
Copyright (c) 1999 Rev. 1.2 11/99
Output Voltage
2.8V 100mV/Div.
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
CHARACTERISTICS CURVES
95
100
90
95
EFFICIENCY (%) _ _
90
85
EFFICIENCY (%) _ _
Output Set Point
85
80
80
Output Set Point
75
EFFICIENCY AT 3.1V EFFICIENCY AT 2.8V EFFICIENCY AT 1.8V
75
EFFICIENCY AT 3.1V EFFICIENCY AT 2.8V EFFICIENCY AT 1.8V
70 1 2 3 4 5 6 7 8 9 10 11 12 13 14
70 1 2 3 4 5 6 7 8 9 10 11 12 13 14
IOUT (A)
IOUT (A)
FIGURE 2 -- Efficiency Test Results: Non-Synchronous Operation, VIN = 5V
FIGURE 3 -- Efficiency Test Results: Synchronous Operation, VIN = 5V
90
85
80
75
70 Output Set Point
1.8V EFFICIENCY
65
2.8V EFFICIENCY 3.3V EFFICIENCY
60 1 2 3 4 5 6 7 8 9 10 11 12 13 14 IOUT (A)
FIGURE 4 -- Efficiency Test Results: Synchronous Operation, VIN = 12V.
Note: Non-synchronous operation not recommended for 12V operation, due to power loss in Schottky diode.
Copyright (c) 1999 Rev. 1.2 11/99
5
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
BLOCK DIAGRAM
VCC SS 1 2V Out UVLO 10.6/10.1 Trimmed 2V REF Internal VCC R DOM VREG Break Before Make Error Comp 0.7V SYNC EN Comp PWM Latch S R Q
18 VC1
17 TDRV
Q
16 GND
40mV
15 BDRV
INV 2
Off-Time Controller
14 VCC
VCC_CORE 3
100mV ** CS Comp OV Comp
CT 13 UV Comp
12 OV* 10 PWRGD*
10k
DAC OUT LX1665/1665A ONLY 1.5V Linear Op Amp
11 LDRV 9 LFB 4 5 6 7 8
DAC
VID0
VID1
VID2
VID3
VID4
Note: Pin numbers are correct for LX1665/1665A, 18-pin package. * Not connected on LX1664/1664A. ** 60mV in LX1664A/1665A.
FIGURE 5 -- LX1664/1665 Block Diagram
6
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
Pin Name
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
FUNCTIONAL PIN DESCRIPTION
LX1664 Pin #
1 2 3 4 5 6 7 8
LX1665 Pin #
1 2 3 4 5 6 7 8
Description
Soft-Start pin, internally connected to the non-inverting input of the error comparator. Inverting input of the error comparator. Output voltage. Connected to non-inverting input of the current-sense comparator. Voltage Identification pin (LSB) input used to set output voltage. Voltage Identification pin (2nd SB) input. Voltage Identification pin (3rd SB) input. Voltage Identification pin (4th SB) input. Voltage Identification pin (MSB) input. This pin is also the range select pin -- when low (CLOSED), output voltage is set to between 1.30 and 2.05V in 0.05V increments. When high (OPEN), output is adjusted from 2.0 to 3.5V in 0.1V increments. Linear regulator feedback pin. 1.5V reference is connected to a resistor divider to set desired output voltage. Open collector output pulls low when the output voltage is out of limits. Linear regulator drive pin. Connect to gate of MOSFET for linear regulator function. SCR driver goes high when the processor's supply is over specified voltage limits. The off-time is programmed by connecting a timing capacitor to this pin. This is the (12V) supply to the IC, as well as gate drive to the bottom FET. This is the gate drive to the bottom FET. Leave open in non-synchronous operation (when bottom FET is replaced by a Schottky diode). Both power and signal ground of the device. Gate drive for top MOSFET. This pin is a separate power supply input for the top drive. Can be connected to a charge pump when only 12V is available.
LFB PWRGD LDRV OV CT VCC BDRV GND TDRV VC1
9 N.C. 10 N.C. 11 12 13 14 15 16
9 10 11 12 13 14 15 16 17 18
Copyright (c) 1999 Rev. 1.2 11/99
7
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
T H E O R Y O F O P E R AT I O N IC OPERATION Referring to the block diagram and typical application circuit, the output turns ON the top MOSFET, allowing the inductor current to increase. At the error comparator threshold, the PWM latch is reset, the top MOSFET turns OFF and the synchronous MOSFET turns ON. The OFF-time capacitor CT is now allowed to discharge. At the valley voltage, the synchronous MOSFET turns OFF and the top MOSFET turns on. A special break-before-make circuit prevents simultaneous conduction of the two MOSFETS. The VCC_CORE pin is offset by +40mV to enhance transient response. The INV pin is connected to the positive side of the current sense resistor, so the controller regulates the positive side of the sense resistor. At light loads, the output voltage will be regulated above the nominal setpoint voltage. At heavy loads, the output voltage will drop below the nominal setpoint voltage. To minimize frequency variation with varying output voltage, the OFFtime is modulated as a function of the voltage at the VCC_CORE pin. ERROR VOLTAGE COMPARATOR The error voltage comparator compares the voltage at the positive side of the sense resistor to the set voltage plus 40mV. An external filter is recommended for high-frequency noise. CURRENT LIMIT Current limiting is done by sensing the inductor current. Exceeding the current sense threshold turns the output drive OFF and latches it OFF until the PWM latch Set input goes high again. See Current Limit Section in "Using The LX1664/65 Devices" later in this data sheet. OFF-TIME CONTROL TIMING The timing capacitor CT allows programming of the OFF-time. The timing capacitor is quickly charged during the ON time of the top MOSFET and allowed to discharge when the top MOSFET is OFF. In order to minimize frequency variations while providing different supply voltages, the discharge current is modulated by the voltage at the VCC_CORE pin. The OFF-time is inversely proportional to the VCC_CORE voltage. UNDER VOLTAGE LOCKOUT The purpose of the UVLO is to keep the output drive off until the input voltage reaches the start-up threshold. At voltages below the start-up voltage, the UVLO comparator disables the internal biasing, and turns off the output drives. The SS (Soft-Start) pin is pulled low. SYNCHRONOUS CONTROL The synchronous control section incorporates a unique breakbefore-make function to ensure that the primary switch and the synchronous switch are not turned on at the same time. Approximately 100 nanoseconds of deadtime is provided by the breakbefore-make circuitry to protect the MOSFET switches. PROGRAMMING THE OUTPUT VOLTAGE The output voltage is set by means of a 5-bit digital Voltage Identification (VID) word (See Table 1). The VID code may be hardwired into the package of the processor which do not have a VID code, the output voltage can be set by means of a DIP switch or jumpers. For a low or '0' signal, connect the VID pin to ground (DIP switch ON); for a high or '1' signal, leave the VID pin open (DIP switch OFF). The five VID pins on the LX166x series are designed to interface directly with a Pentium Pro or Pentium II processor. Therefore, all inputs are expected to be either ground or floating. Any floating input will be pulled high by internal connections. If using a Socket 7 processor, or other load, the VID code can be set directly by connecting jumpers or DIP switches to the VID[0:4] pins. The VID pins are not designed to take TTL inputs, and should not be connected high. Unpredictable output voltages may result. If the LX166x devices are to be connected to a logic circuit, such as BIOS, for programming of output voltage, they should be buffered using a CMOS gate with open-drain, such as a 74HC125 or 74C906. POWER GOOD SIGNAL (LX1665 only) An open collector output is provided which presents high impedance when the output voltage is between 90% and 117% of the programmed VID voltage, measured at the SS pin. Outside this window the output presents a low impedance path to ground. The Power Good function also toggles low during OVP operation. OVER-VOLTAGE PROTECTION The controller is inherently protected from an over-voltage condition due to its constant OFF-time architecture. However, should a failure occur at the power switch, an over-voltage drive pin is provided (on the LX1665 only) which can drive an external SCR crowbar (Q3), and so blow a fuse (F1). the fault condition must be removed and power recycled for the LX1665 to resume normal operation (See Figure 9). LINEAR REGULATOR The product highlight application shows an application schematic using a MOSFET as the pass element for a linear regulator. this output is suitable for converting the 5V system supply to 3.3V for processor I/O buffers, memory, chipset and other components. The output can be adjusted to any voltage between 1.5V and 3.6V in order to supply other (lower) power requirements on a motherboard. See section "Using the LX1664/1665 Devices" at the end of this data sheet.
8
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N
12V C3 0.1F
1 2 3
5V 6.3V 1500F x3 C2 Q1
IRL3102
U1 LX1664
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 VC1 TDRV GND BDRV VCC CT LDRV LFB
16 15 14 13 12 11 10 9
C5 1F
VID0 VID1 VID2 VID3 VID4
4 5 6 7 8
L1, 2.5H Q2 C8 680pF
IRL3303
R1 2.5m9
Supply Voltage for CPU Core
VOUT
6.3V, 1500F x 3**
C1
16-pin Narrow Body SOIC
C9 330F Q4 IRLZ44 R5 R6
** Three capacitors for Pentium Four capacitors for Pentium II
C7 330F
Supply Voltage For I/O Chipset or GTL+ Bus
FIGURE 6 -- LX1664 In A Pentium / Socket 7 Single-Chip Power Supply Controller Solution (Synchronous)
C3 0.1F
1 2 3
12V
5V C5 1F Q1 IRL3102 D1
U1 LX1664
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 VC1 TDRV GND BDRV VCC CT LDRV LFB
16 15 14 13 12 11 10 9
6.3V 1500F x3 C2 R1 0.005
Supply Voltage for CPU Core
VID0 VID1 VID2 VID3 VID4
4 5 6 7 8
L1, 5H
C1 Q4 IRLZ44 R5 R6 C9 330F C7 330F
VOUT
6.3V, 1500F x 3**
** Three capacitors for Pentium Four capacitors for Pentium II
16-pin Narrow Body SOIC
C8 680pF
Supply Voltage For I/O Chipset or GTL+ Bus
FIGURE 7 -- LX1664 In A Non-Synchronous / Socket 7 Power Supply Application
Copyright (c) 1999 Rev. 1.2 11/99
9
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N
CS 5V RS
12V C3 0.1F
1 2 3
F1 15A L2 1H Q1
U1 LX1665
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 LFB VC1 TDRV GND BDRV VCC CT OV LDRV PWRGD
18 17 16 15 14 13 12 11 10
C5 1F
C2 6.3V 1500F x3
IRL3102
L1 2.5H 5V or 3.3V Supply
Supply Voltage for CPU Core
VID0 VID1 VID2 VID3 VID4
4 5 6 7 8 9
Q2
VOUT
IRL3303
C8 680pF Q4 IRLZ44 R5 R6
6.3V, 1500F x 3
C1
C9 330F
** Three capacitors for Pentium Four capacitors for Pentium II
18-pin Wide Body SOIC
OV PWRGD
1.5V for GTL+ Bus Supply
C7 330F
FIGURE 8 -- VRM 8.2 (Pentium II / Deschutes) Reference Design With Loss-Less Current Sensing
D2 1N4148 C3 0.1F
1 2 3
D3 1N4148 C10 0.1F R7 10
F1 20A
12V
5V
U1 LX1665
SS INV VCC_CORE VID0 VID1 VID2 VID3 VID4 LFB VC1 TDRV GND BDRV VCC CT OV LDRV PWRGD
18 17 16 15 14 13 12 11 10
1F
C5
6.3V 1500F x3 C2 Q1
IRL3303
L1 2.5H C9
R1 0.0025
Supply Voltage for CPU Core
VID1 VID2 VID3 VID4
5 6 7 8 9
330F
C8
1500F
1N5817
D4
Q3 SCR 2N6504 Q4 IRLZ44
C1
18-pin Wide-Body SOIC
R2, 10k
PWRGD
R5 R6
C7 330F
Supply Voltage For I/O Chipset or GTL+ Bus
FIGURE 9 -- Full-Featured Pentium II Processor Supply With 12V Power Input
6.3V, 1500F x 3**
IRL3102
** Three capacitors for Pentium Four capacitors for Pentium II
VID0
4
Q2
VOUT
10
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
B I L L O F M AT E R I A L S
Ref
C1 C2 C7, C9 C3 C4 C8 C5 L1 L2 Q1 Q2 Q3 R5, R6 R1 U1 Total
Description
LX1665 Bill of Materials (Refer to Product Highlight) Part Number / Manufacturer
MV-GX Sanyo MV-GX Sanyo MV-GX Sanyo SMD Cap SMD Cap SMD Cap SMD Ceramic HM0096832 BI or equivalent IRL3102 International Rectifier or equivalent IRL3303 International Rectifier or equivalent IRLZ44 International Rectifier or equivalent SMD Resistor IRC OARS-1 or PCB trace LX1665CDW Linfinity
Qty.
4 2 2 1 1 1 1 1 1 1 1 1 2 1 1 21
1500F, 6.3V capacitor 1500F, 6.3V capacitor 330F, Electrolytic 0.1F 390pF 680pF 1F, 16V 2.5H Inductor 1H Inductor MOSFET MOSFET MOSFET Resistor (See Table 6 for values) 2.5m Sense Resistor Controller IC
USING THE LX1664/65 DEVICES The LX1664/65 devices are very easy to design with, requiring only a few simple calculations to implement a given design. The following procedures and considerations should provide effective operation for virtually all applications. Refer to the Application Information section for component reference designators. TIMING CAPACITOR SELECTION The frequency of operation of the LX166x is a function of duty cycle and OFF-time. The OFF-time is proportional to the timing capacitor (which is shown as C8 in all application schematics in this data sheet), and is modulated to minimize frequency variations with duty cycle. The frequency is constant, during steady-state operation, due to the modulation of the OFF-time. The timing capacitor (CT) should be selected using the following equation: (1 - VOUT /VIN ) * IDIS CT = fS (1.52 - 0.29 * VOUT ) Where IDIS is fixed at 200A and fS is the switching frequency (recommended to be around 200kHz for optimal operation and component selection). When using a 5V input voltage, the switching frequency (fS) can be approximated as follows: IDIS CT = 0.621 * f
S
Choosing a 680pF capacitor will result in an operating frequency of 183kHz at VOUT = 2.8V. When a 12V power input is used, he capacitor value must be changed (the optimal timing capacitor for 12V input will be in the range of 1000-1500pF). L1 OUTPUT INDUCTOR SELECTION The inductance value chosen determines the ripple current present at the output of the power supply. Size the inductance to allow a nominal 10% swing above and below the nominal DC load current, using the equation L = VL * T/I, where T is the OFF-time, VL is the voltage across the inductor during the OFFtime, and I is peak-to-peak ripple current in the inductor. Be sure to select a high-frequency core material which can handle the DC current, such as 3C8, which is sized for the correct power level. Typical inductance values can range from 2 to 10H. Note that ripple current will increase with a smaller inductor. Exceeding the ripple current rating of the capacitors could cause reliability problems.
Copyright (c) 1999 Rev. 1.2 11/99
11
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES INPUT INDUCTOR SELECTION In order to cope with faster transient load changes, a smaller output inductor is needed. However, reducing the size of the output inductor will result in a higher ripple voltage on the input supply. This noise on the 5V rail can affect other loads, such as graphics cards. It is recommended that a smaller input inductor, L2 (1 - 1.5H), is used on the 5V rail to filter out the ripple. Ensure that this inductor has the same current rating as the output inductor. C1 FILTER CAPACITOR SELECTION The capacitors on the output of the PWM section are used to filter the output current ripple, as well as help during transient load conditions, and the capacitor bank should be sized to meet ripple and transient performance specifications. When a transient (step) load current change occurs, the output voltage will have a step which equals the product of the Effective Series Resistance (ESR) of the capacitor and the current step (I). when current increases from low (in sleep mode) to high, the output voltage will drop below its steady state value. In the advanced microprocessor power supply, the capacitor should usually be selected on the basis of its ESR value, rather than the capacitance or RMS current capability. Capacitors that satisfy the ESR requirement usually have a larger capacitance and current capability than needed for the application. The allowable ESR can be found by: ESR * (IRIPPLE + I) < VEX Where VEX is the allowable output voltage excursion in the transient and IRIPPLE is the inductor ripple current. Regulators such as the LX166x series, have adaptive output voltage positioning, which adds 40mV to the DC set-point voltage -- VEX is therefore the difference between the low load voltage and the minimum dynamic voltage allowed for the microprocessor. Ripple current is a function of the output inductor value (LOUT), and can be approximated as follows: VIN - VOUT VOUT IRIPPLE = *V fS * LOUT IN Where fS is the switching frequency. Electrolytic capacitors can be used for the output filter capacitor bank, but are less stable with age than tantalum capacitors. As they age, their ESR degrades, reducing the system performance and increasing the risk of failure. It is recommended that multiple parallel capacitors are used so that, as ESR increases with age, overall performance will still meet the processor's requirements. There is frequently strong pressure to use the least expensive components possible, however, this could lead to degraded longterm reliability, especially in the case of filter capacitors. Linfinity's demo boards use Sanyo MV-GX filter capacitors, which are C1 FILTER CAPACITOR SELECTION (continued) aluminum electrolytic, and have demonstrated reliability. The Oscon series from Sanyo generally provides the very best performance in terms of long term ESR stability and general reliability, but at a substantial cost penalty. The MV-GX series provides excellent ESR performance, meeting all Intel transient specifications, at a reasonable cost. Beware of off-brand, very-low cost filter capacitors, which have been shown to degrade in both ESR and general electrolyte characteristics over time. CURRENT LIMIT Current limiting occurs when a sensed voltage, proportional to load current, exceeds the current-sense comparator threshold value. The current can be sensed either by using a fixed sense resistor in series with the inductor to cause a voltage drop proportional to current, or by using a resistor and capacitor in parallel with the inductor to sense the voltage drop across the parasitic resistance of the inductor. The LX166x family offers two different comparator thresholds. The LX1664 & 1665 have a threshold of 100mV, while the LX1664A and LX1665A have a threshold of 60mV. The 60mV threshold is better suited to higher current loads, such as a Pentium II or Deschutes processor.
Sense Resistor The current sense resistor, R1, is selected according to the formula:
R1 = VTRIP / ITRIP Where VTRIP is the current sense comparator threshold (100mV for LX1664/65 and 60mV for LX1664A/65A) and ITRIP is the desired current limit. Typical choices are shown below. TABLE 2 - Current Sense Resistor Selection Guide
Load
Pentium-Class Processor (<10A) Pentium II Class (>10A)
Sense Resistor Value
5m 2.5m
Recommended Controller
LX1664 or LX1665 LX1664A or LX1665A
A smaller sense resistor will result in lower heat dissipation (IR) and also a smaller output voltage droop at higher currents. There are several alternative types of sense resistor. The surface-mount metal "staple" form of resistor has the advantage of exposure to free air to dissipate heat and its value can be controlled very tightly. Its main drawback, however, is cost. An alternative is to construct the sense resistor using a copper PCB trace. Although the resistance cannot be controlled as tightly, the PCB trace is very low cost.
12
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES CURRENT LIMIT (continued) CURRENT LIMIT (continued) The current flowing through the inductor is a triangle wave. If the sensor components are selected such that: L/RL = RS * CS The voltage across the capacitor will be equal to the current flowing through the resistor, i.e. VCS = ILRL Since VCS reflects the inductor current, by selecting the appropriate RS and CS, VCS can be made to reach the comparator voltage (60mV for LX166xA or 100mV for the LX166x) at the desired trip current.
PCB Sense Resistor A PCB sense resistor should be constructed as shown in Figure 10. By attaching directly to the large pads for the capacitor and inductor, heat is dissipated efficiently by the larger copper masses. Connect the current sense lines as shown to avoid any errors.
2.5m9 Inductor
Sense Resistor
100mil Wide, 850mil Long 2.5mm x 22mm (2 oz/ft2 copper)
Output Capacitor Pad Sense Lines
FIGURE 10 -- Sense Resistor Construction Diagram Recommended sense resistor sizes are given in the following table: TABLE 3 - PCB Sense Resistor Selection Guide
Copper Weight
2 oz/ft2
Design Example (Pentium II circuit, with a maximum static current of 14.2A) The gain of the sensor can be characterized as:
|T(j M )|
RL L/RSCS M
Copper Desired Resistor Thickness Value
68m 2.5m 5m
Dimensions (w x l) mm inches
2.5 x 22 2.5 x 43 0.1 x 0.85 0.1 x 1.7
1/RSCS
RL/L
FIGURE 12 -- Sensor Gain The dc/static tripping current Itrip,S satisfies: Vtrip Itrip,S = RL Select L/RSCS RL to have higher dynamic tripping current than the static one. The dynamic tripping current Itrip,d satisfies: Vtrip Itrip,d = L/(RSCS)
Loss-Less Current Sensing Using Resistance of Inductor Any inductor has a parasitic resistance, RL, which causes a DC voltage drop when current flows through the inductor. Figure 11 shows a sensor circuit comprising of a surface mount resistor, RS, and capacitor, CS, in parallel with the inductor, eliminating the current sense resistor.
L
RL
Load
RS Current Sense Comparator
CS VCS RS2
General Guidelines for Selecting RS , CS , and RL Vtrip RL = I Select: RS 10 k trip,S Ln and CS according to: CS n = R R LS
The above equation has taken into account the current-dependency of the inductance. The test circuit (Figure 6) used the following parameters: RL = 3m, RS = 9k, CS = 0.1F, and L is 2.5H at 0A current.
FIGURE 11 -- Current Sense Circuit
Copyright (c) 1999 Rev. 1.2 11/99
13
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES CURRENT LIMIT (continued) In cases where RL is so large that the trip point current would be lower than the desired short-circuit current limit, a resistor (RS2) can be put in parallel with CS, as shown in Figure 11. The selection of components is as follows: RL (Required) RS2 = RL (Actual) RS2 + RS L CS = RL (Actual) * (RS2 // RS) = L RL (Actual) * RS + RS2 RS2 * RS FET SELECTION (continued) For the IRL3102 (13m RDS(ON)), converting 5V to 2.8V at 14A will result in typical heat dissipation of 1.48W.
Synchronous Rectification - Lower MOSFET The lower pass element can be either a MOSFET or a Schottky diode. The use of a MOSFET (synchronous rectification) will result in higher efficiency, but at higher cost than using a Schottky diode (non-synchronous). Power dissipated in the bottom MOSFET will be:
PD = I2 * RDS(ON) * [1 - Duty Cycle] = 2.24W
Again, select (RS2//RS) < 10k. FET SELECTION To insure reliable operation, the operating junction temperature of the FET switches must be kept below certain limits. The Intel specification states that 115C maximum junction temperature should be maintained with an ambient of 50C. This is achieved by properly derating the part, and by adequate heat sinking. One of the most critical parameters for FET selection is the RDS ON resistance. This parameter directly contributes to the power dissipation of the FET devices, and thus impacts heat sink design, mechanical layout, and reliability. In general, the larger the current handling capability of the FET, the lower the RDS ON will be, since more die area is available. TABLE 4 - FET Selection Guide
This table gives selection of suitable FETs from International Rectifier.
[IRL3303 or 1.12W for the IRL3102]
Catch Diode - Lower MOSFET A low-power Schottky diode, such as a 1N5817, is recommended to be connected between the gate and source of the lower MOSFET when operating from a 12V-power supply (see Figure 9). This will help protect the controller IC against latch-up due to the inductor voltage going negative. Although latch-up is unlikely, the use of such a catch diode will improve reliability and is highly recommended. Non-Synchronous Operation - Schottky Diode A typical Schottky diode, with a forward drop of 0.6V will dissipate 0.6 * 14 * [1 - 2.8/5] = 3.7W (compared to the 1.1 to 2.2W dissipated by a MOSFET under the same conditions). This power loss becomes much more significant at lower duty cycles - synchronous rectification is recommended especially when a 12V-power input is used. The use of a dual Schottky diode in a single TO-220 package (e.g. the MBR2535) helps improve thermal dissipation.
MOSFET GATE BIAS The power MOSFETs can be biased by one of two methods: charge pump or 12V supply connected to VC1. 1) Charge Pump (Bootstrap) When 12V is supplied to the drain of the MOSFET, as in Figure 9, the gate drive needs to be higher than 12V in order to turn the MOSFET on. Capacitor C10 and diodes D2 & D3 are used as a charge pump voltage doubling circuit to raise the voltage of VC1 so that the TDRV pin always provides a high enough voltage to turn on Q1. The 12V supply must always be connected to VCC to provide power for the IC itself, as well as gate drive for the bottom MOSFET. 2) 12V Supply When 5V is supplied to the drain of Q1, a 12V supply should be connected to both VCC and VC1.
Device
IRL3803 IRL22203N IRL3103 IRL3102 IRL3303 IRL2703
RDS(ON) @ 10V (m)
6 7 14 13 26 40
ID @ TC = 100C
83 71 40 56 24 17
Max. Breakdown Voltage
30 30 30 20 30 30
All devices in TO-220 package. For surface mount devices (TO-263 / D2-Pak), add 'S' to part number, e.g. IRL3103S.
The recommended solution is to use IRL3102 for the high side and IRL3303 for the low side FET, for the best combination of cost and performance. Alternative FET's from any manufacturer could be used, provided they meet the same criteria for RDS(ON).
Heat Dissipated In Upper MOSFET The heat dissipated in the top MOSFET will be:
PD = (I2 * RDS(ON) * Duty Cycle) + (0.51 * VIN * tSW * fS ) Where tSW is switching transition line for body diode (~100ns) and fS is the switching frequency.
14
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES LINEAR REGULATOR Referring to the front page Product Highlight, a schematic is presented which uses a MOSFET as a series pass element for a linear regulator. The MOSFET is driven by the LX1664 controller, and down-converts a +5V or +3.3V supply to the desired VOUT level, between 1.5 & 3.5V, as determined by the feedback resistors. The current available from the Linear regulator is dictated by the supply capability, as well as the MOSFET ratings, and will typically lie in the 3-5 ampere range. This output is well suited for I/O buffers, memory, chipset and other components. Using 3.3V supply to convert to 1.5V for GTL+ Bus will significantly reduce heat dissipation in the MOSFET. LINEAR REGULATOR (continued)
MOSFET Comments Heatsinking the MOSFET becomes important, since the linear stage output current could approach 5 amperes in some applications. Since there are no switching losses, power dissipation in the MOSFET is simply defined by PD = (VIN - VOUT) * I output current. This means that a +5VIN to +3.3VOUT at 5A will require that the MOSFET dissipate (5-3.3) * 5 = 8.5 watts. This amount of power in a MOSFET calls for a heatsink, which will be the same physical size as that required for a monolithic LDO, such as the LX8384 device. The dropout voltage for the linear regulator stage is the product of RDS ON * IOUT. Using a 2SK1388 device at 5A, the dropout voltage will be (worst case) 37 milliohms x 5A = 185mV. Note that the RDS ON of the (linear regulator) MOSFET does not affect heat dissipation, only dropout voltage. For reasons of economy, a FET with a higher resistance can be chosen for the linear regulator, e.g. 2SK1388 or IRLZ44.
TABLE 5 - Linear Regulator MOSFET Selection Guide Device
IRFZ24N IRL2703 IRLZ44N
FIGURE 13 -- Typical Transient Response Channel 2 = Linear Regulator Output. Set point = 3.3V @ 2A (20mV/div.) Channel 4 = Switching Regulator Output. VCC_CORE set point = 2.8V Channel 3 = Switching Regulator Load Current Transient 0 - 13A
Output Voltage Setting As shown in Application Information Figures 6-9, two resistors (R5 & R6) set the linear regulator stage output voltage:
VOUT = 1.5 * (R5 + R6) / R6 As an example, to set resistor magnitudes, assume a desired VOUT of 3.3 volts: 1.5 * (12.1k + 10k) / 10k = 3.3 volts (approximately) In general, the divider resistor values should be in the vicinity of 10-12k ohm for optimal noise performance. Please refer to Table 6.
RDS(ON) @ 10V (m)
70 40 22
ID @ TC = 100C
12 17 29
Max. Breakdown Voltage
55 30 55
Avoiding Crosstalk To avoid a load transient on the switching output affecting the linear regulator, follow these guidelines:
1) Separate 5V supply traces to switching & linear FETs as much as possible. 2) Place capacitor C9 as close to drain of Q4 as possible. Typical transient response is shown in Figure 13.
Copyright (c) 1999 Rev. 1.2 11/99
15
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES LINEAR REGULATOR (continued) TABLE 6 Resistors Settings for Linear Regulator Output Voltage
Nominal Set Point (V)
3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5
LAYOUT GUIDELINES - THERMAL DESIGN A great deal of time and effort were spent optimizing the thermal design of the demo boards. Any user who intends to implement an embedded motherboard would be well advised to carefully read and follow these guidelines. If the FET switches have been carefully selected, external heatsinking is generally not required. However, this means that copper trace on the PC board must now be used. This is a potential trouble spot; as much copper area as possible must be dedicated to heatsinking the FET switches, and the diode as well if a non-synchronous solution is used. In our VRM module, heatsink area was taken from internal ground and VCC planes which were actually split and connected with VIAS to the power device tabs. The TO-220 and TO-263 cases are well suited for this application, and are the preferred packages. Remember to remove any conformal coating from all exposed PC traces which are involved in heatsinking.
R5 (k)
12 11.3 11.3 11 10.3 10 10 10 9.76 8.87 8.87 8.87 8.87 8.87 8.87 7.15 7.15 7.15 7.15
R6 (k)
10 10 10.7 11 11 11.5 12.4 13.7 14.7 14.7 16.5 18.7 22.1 26.7 21 35.7 53.6 100
VOUT (V)
3.30 3.20 3.08 3.00 2.90 2.80 2.71 2.59 2.50 2.41 2.31 2.21 2.10 2.00 2.13 1.80 1.70 1.61 1.50
Capacitor Selection Referring to the Product Highlight schematic on the front page, the standard value to use as the linear regulator stage output capacitor is on the order of 330F. This provides sufficient hold-up for all expected transient load events in memory and I/O circuitry. Disabling Linear Output Linear regulator output can be disabled by pulling feedback pin (LFB) up to 5V as shown in Figure 14.
TABLE 7 - Linear Enable (LIN EN) Function Table LIN EN LIN OUTPUT H L
5V
General Notes As always, be sure to provide local capacitive decoupling close to the chip. Be sure use ground plane construction for all highfrequency work. Use low ESR capacitors where justified, but be alert for damping and ringing problems. High-frequency designs demand careful routing and layout, and may require several iterations to achieve desired performance levels. Power Traces To reduce power losses due to ohmic resistance, careful consideration should be given to the layout of traces that carry high currents. The main paths to consider are:
I Input power from 5V supply to drain of top MOSFET. I Trace between top MOSFET and lower MOSFET or Schottky diode. I Trace between lower MOSFET or Schottky diode and ground. I Trace between source of top MOSFET and inductor, sense resistor and load.
Input 5V or 12V
Disabled Enabled
LX1664
10 9
C10 0.1F
C9 330F Q4 IRLZ44 R5
LDRV LFB
10k
LIN EN
10k R6 2N2222
C7 330F
Supply Voltage For I/O Chipset
LX166x
Output
FIGURE 14 -- Enabling Linear Regulator
FIGURE 15 -- Power Traces
16
Copyright (c) 1999 Rev. 1.2 11/99
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS
P
RODUCTION
WITH
5-BIT DAC
D
ATA
S
HEET
USING THE LX1664/65 DEVICES LAYOUT GUIDELINES - THERMAL DESIGN (continued) All of these traces should be made as wide and thick as possible, in order to minimize resistance and hence power losses. It is also recommended that, whenever possible, the ground, input and output power signals should be on separate planes (PCB layers). See Figure 15 - bold traces are power traces.
C5 Input Decoupling (VCC) Capacitor Ensure that this 1F capacitor is placed as close to the IC as possible to minimize the effects of noise on the device.
Layout Assistance Please contact Linfinity's Applications Engineers for assistance with any layout or component selection issues. A Gerber file with layout for the most popular devices is available upon request. Evaluation boards are also available upon request. Please check Linfinity's web site for further application notes.
R E L AT E D D E V I C E S
LX1662/1663 - Single Output PWM Controllers LX1553 - PWM Controller for 5V - 3.3V Conversion LX1668 - Triple Output PWM Controller
Pentium is a registered trademark of Intel Corporation. Cyrix is a registered trademark and 6x86 and Gx86 are trademarks of Cyrix Corporation. K6 is a trademark of AMD. Power PC is a trademark of International Business Machines Corporation. Alpha is a trademark of Digital Equipment Corporation. PRODUCTION DATA - Information contained in this document is proprietary to LinFinity, and is current as of publication date. This document may not be modified in any way without the express written consent of LinFinity. Product processing does not necessarily include testing of all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright (c) 1999 Rev. 1.2 11/99
17

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